Senior Engineer needed by Ulkasemi in Santa Clara, CA. Convert specs of electrical circuits to layout & install components. Perform chip top-level partitioning, clock & power distribution, hard macro integration & I/O planning.
Req. Bachelor's in Electronics Engineering or related, 2yr exp as Electronics Engineer, Physical Design Engineers, or related. Exp of Netlist to GDSII Implementation, Physical Design Methodologies & sub-micron tech of 16nm & lower tech nodes, PNR Suite from Synopsys (ICC2, fusion), Static Timing Analysis (PrimeTime – SI), EM/IR-Drop analysis (PT-PX, Redhawk), & Physical Verification (Calibre/ICV).
Salary $127,234/yr. Send resume to [email protected] ref job#3894.
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